An autocorrelation-less single-bit Weiner filter on FPGA

Filtering, transformations, and convolution in digital signal processing (DSP) are relatively resource-intensive algorithms, typically involving massive computations and complex processing architectures. Effective methods to manage this complexity include reducing the data word length using techniques such as sigma-delta modulation (SDM) and algorithmic optimization, either targeting coding style or via changes to the algorithm itself. In this paper, an SDM-based autocorrelation-less Weiner filter is proposed and compared with traditional multi-bit and SDM-based single-bit Weiner filters. The proposed design is first functionally verified using MATLAB simulations, and statistical parameters such as Signal to Noise Ratio (SNR), Mean Square Error (MSE), and Probability of Error (PE) are derived. The results show that the proposed design offers comparable performance to conventional filters. The proposed autocorrelation-less filter and equivalent conventional filters are then synthesized in FPGA for area-performance analysis. The SDM-based autocorrelation-less Weiner filter demonstrates a 30% improvement in performance over an equivalent traditional filter, which in result provides the shift in operating frequency from approximately 240 MHz to around 340 MHz, with about 63% less resources consumption. This improved performance and reduced resources increase the potential range of applications for this Weiner filter.