Analysis of Existing and Proposed 3-Bit and Multi-Bit Multiplier Algorithms for FIR Filters and Adaptive Channel Equalizers on FPGA

Research output: Contribution to journalArticlepeer-review

Original languageEnglish
Pages (from-to)81-89
Number of pages9
JournalQUEST RESEARCH JOURNAL,
DOIs
Publication statusPublished - 2021
Externally publishedYes

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