TY - GEN
T1 - Area-performance-power analysis of hand gesture recognition system in FPGA
AU - Teevno, Mansoor Ali
AU - Memon, Tayab D.
AU - Khaskheli, Shoaib Hassan
AU - Memon, Sahrish
N1 - Publisher Copyright:
© 2018 IEEE.
PY - 2018/4/24
Y1 - 2018/4/24
N2 - In this paper, we have designed a hand gesture recognition system that can detect static hand gestures and analyze its performance and resource utilization on different FPGA architectures and verify its operation through software hardware co-simulation. Various parameters like resource utilization, area performance, power consumption of the proposed design has been determined after successful testing of the design on two different FPGA architectures, viz. Virtex-5 and Spartan-6. A thorough analysis of the results indicates that both the target devices work equally well in regards to area utilization, Spartan-6 performs slower as compared to Virtex-5, while Virtex-5 consumes more power for the same design in comparison to Spartan-6.
AB - In this paper, we have designed a hand gesture recognition system that can detect static hand gestures and analyze its performance and resource utilization on different FPGA architectures and verify its operation through software hardware co-simulation. Various parameters like resource utilization, area performance, power consumption of the proposed design has been determined after successful testing of the design on two different FPGA architectures, viz. Virtex-5 and Spartan-6. A thorough analysis of the results indicates that both the target devices work equally well in regards to area utilization, Spartan-6 performs slower as compared to Virtex-5, while Virtex-5 consumes more power for the same design in comparison to Spartan-6.
KW - FPGA
KW - Hand Gesture
KW - Principle Component Analysis
KW - System Generaotr
UR - http://www.scopus.com/inward/record.url?scp=85050997329&partnerID=8YFLogxK
U2 - 10.1109/ICOMET.2018.8346353
DO - 10.1109/ICOMET.2018.8346353
M3 - Conference contribution
AN - SCOPUS:85050997329
T3 - 2018 International Conference on Computing, Mathematics and Engineering Technologies: Invent, Innovate and Integrate for Socioeconomic Development, iCoMET 2018 - Proceedings
SP - 1
EP - 6
BT - 2018 International Conference on Computing, Mathematics and Engineering Technologies
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 2018 International Conference on Computing, Mathematics and Engineering Technologies, iCoMET 2018
Y2 - 3 March 2018 through 4 March 2018
ER -