TY - JOUR
T1 - Computationally Efficient Low-Power Sigma-Delta Modulation-Based Image Noise Removal Filter
AU - Pathan, Aneela
AU - Memon, Tayab D.
AU - Shah, Syed Haseeb
AU - Mangi, Rizwan Aziz
N1 - Publisher Copyright:
© The Author(s), under exclusive licence to Springer Science+Business Media, LLC, part of Springer Nature 2024.
PY - 2024
Y1 - 2024
N2 - Image degradation, caused by various factors, often results in noise and blur. For image restoration, inverse filters are typically used, while Wiener filters are employed for noise reduction. Unlike text or voice processing, image processing deals with significantly larger data volumes, necessitating greater computational resources. This demand can saturate resource-limited hardware such as FPGAs and ASICs, making architectural optimization essential for designing a complete System on Chip or Network on Chip. Although several hardware optimization methods exist in the literature, each has its limitations. Sigma-Delta Modulation has emerged as a promising technique in recent years, particularly for reducing the complexity of DSP systems by shortening word lengths from multi-bit to single-bit. This reduction simplifies systems and conserves hardware resources. While SDM has been widely applied in various domains, including basic arithmetic and complex adaptive filters, its use has been largely confined to speech and text processing. In recent work, the authors proposed a novel application of SDM in image processing. This study extends that investigation by designing a single-bit SDM-based Wiener filter for image noise reduction. The proposed single-bit filter is functionally compared against traditional Wiener filters, Steepest-Descent filters, and Adaptive Mean filters. Key statistical metrics such as noise variance, signal-to-noise ratio, Mean Squared Error, and Peak SNR are simulated and analyzed for real-time performance evaluation. The results demonstrate that the proposed single-bit technique remains robust against noise in dynamic environments. An FPGA-based implementation of the single-bit system further highlights its efficiency, requiring fewer resources and consuming less operational power. The findings confirm that the proposed design outperforms conventional methods in terms of effectiveness, statistical performance, and resource-optimized implementation, thereby enhancing its acceptability and robustness. The study is further strengthened by qualitative and quantitative analyses, with simulation results clearly illustrating the advantages of the proposed single-bit filter over conventional multi-bit approaches.
AB - Image degradation, caused by various factors, often results in noise and blur. For image restoration, inverse filters are typically used, while Wiener filters are employed for noise reduction. Unlike text or voice processing, image processing deals with significantly larger data volumes, necessitating greater computational resources. This demand can saturate resource-limited hardware such as FPGAs and ASICs, making architectural optimization essential for designing a complete System on Chip or Network on Chip. Although several hardware optimization methods exist in the literature, each has its limitations. Sigma-Delta Modulation has emerged as a promising technique in recent years, particularly for reducing the complexity of DSP systems by shortening word lengths from multi-bit to single-bit. This reduction simplifies systems and conserves hardware resources. While SDM has been widely applied in various domains, including basic arithmetic and complex adaptive filters, its use has been largely confined to speech and text processing. In recent work, the authors proposed a novel application of SDM in image processing. This study extends that investigation by designing a single-bit SDM-based Wiener filter for image noise reduction. The proposed single-bit filter is functionally compared against traditional Wiener filters, Steepest-Descent filters, and Adaptive Mean filters. Key statistical metrics such as noise variance, signal-to-noise ratio, Mean Squared Error, and Peak SNR are simulated and analyzed for real-time performance evaluation. The results demonstrate that the proposed single-bit technique remains robust against noise in dynamic environments. An FPGA-based implementation of the single-bit system further highlights its efficiency, requiring fewer resources and consuming less operational power. The findings confirm that the proposed design outperforms conventional methods in terms of effectiveness, statistical performance, and resource-optimized implementation, thereby enhancing its acceptability and robustness. The study is further strengthened by qualitative and quantitative analyses, with simulation results clearly illustrating the advantages of the proposed single-bit filter over conventional multi-bit approaches.
KW - Image processing
KW - MATLAB
KW - Optimization
KW - Sigma delta modulation
KW - Wiener filter
UR - http://www.scopus.com/inward/record.url?scp=85207029252&partnerID=8YFLogxK
U2 - 10.1007/s00034-024-02868-y
DO - 10.1007/s00034-024-02868-y
M3 - Article
AN - SCOPUS:85207029252
SN - 0278-081X
JO - Circuits, Systems, and Signal Processing
JF - Circuits, Systems, and Signal Processing
ER -