FPGA based area-power-performance analysis of LMS filter using conventional and proposed multipliers

A. Pathan, T. D. Memon, F. Khan Sohu

Research output: Contribution to journalConference articlepeer-review

Abstract

This paper compares LMS filter-based adaptive channel equalizer, implemented on Vertex 7 FPGA using several existing and proposed multipliers. The three main performance parameters taken into consideration are the consumed resources (in terms of lookup tables), utilized power (among various design components), and the performance achieved (in terms of observed frequency). The results show the area-power-performance tradeoff amongst the conventional and proposed multipliers based designs. It is to mention that the proposed multipliers result in more compact systems due to less utilization of resources in all means.

Original languageEnglish
Article number012010
JournalJournal of Physics: Conference Series
Volume1860
Issue number1
DOIs
Publication statusPublished - 7 Apr 2021
Externally publishedYes
Event3rd International Conference on Applied and Practical Sciences, ICAPS 2021 - Kuala Lumpur, Malaysia
Duration: 18 Feb 202119 Feb 2021

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