FPGA Based Implementation and Area Performance Analysis of Sigma-Delta Modulated Steepest Algorithm for Channel Equalization

Tayab D. Memon, Aneela Pathan, Paul Beckett

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

2 Citations (Scopus)

Abstract

FPGA is now a common approach for implementing a wide range of DSP systems from simple to complex. Sigma-delta modulation (SDM) technique in combination with short word-length systems is attractive for almost all DSP applications. In this work, we design an adaptive channel equalizer on MATLAB and FPGA using sigma-delta modulation techniques to implement an improved steepest descent algorithm. Further, for functional validation and area performance analysis, the design is compared with its corresponding multi-bit implementation. The area-performance analysis validates the SDM as a useful technique for word length reduction.

Original languageEnglish
Title of host publication2018, 12th International Conference on Signal Processing and Communication Systems, ICSPCS 2018 - Proceedings
EditorsTadeusz A Wysocki, Beata J Wysocki
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781538656020
DOIs
Publication statusPublished - 31 Jan 2019
Externally publishedYes
Event12th International Conference on Signal Processing and Communication Systems, ICSPCS 2018 - Cairns, Australia
Duration: 17 Dec 201819 Dec 2018

Publication series

Name2018, 12th International Conference on Signal Processing and Communication Systems, ICSPCS 2018 - Proceedings

Conference

Conference12th International Conference on Signal Processing and Communication Systems, ICSPCS 2018
Country/TerritoryAustralia
CityCairns
Period17/12/1819/12/18

Keywords

  • Adaptive filters
  • Channel-Equalization
  • FP Ga
  • MATLAB
  • Sigma-Delta Modulation

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